Given that you already have a partial answer to the three address machine case then this is what I would expect from you (adapted for the processor architecture in question) :
LOAD A, R1
LOAD B, R2
ADD R1, R2, R3
MUL R3, R3, R4
LOAD C, R5
MUL R4, R5, R6
SUB R6, R1, R7
1)
LOAD A, R1
: Load the value of
A
into register
R1
.
2)
LOAD B, R2
: Load the value of
B
into register
R2
.
3)
ADD R1, R2, R3
: Add the values in registers
R1
and
R2
and store the result in register
R3
.
4)
MUL R3, R3, R4
: Multiply the value in register
R3
by itself and store the result in register
R4
.
5)
LOAD C, R5
: Load the value of
C
into register
R5
.
6)
MUL R4, R5, R6
: Multiply the values in registers
R4
and
R5
and store the result in register
R6
.
7)
SUB R6, R1, R7
: Subtract the value in register
R1
from the value in register
R6
and store the result in register
R7
.